---------- Forwarded message ---------- From: Goadhouse, Stephen (sdg6h) Date: Tue, Mar 5, 2013 at 8:55 PM Subject: Re: 8b10b design files To: Tullio Grassi [...] This is the code that directly connects the Virtex 5 SERDES to the design. I believe that you are using a Virtex 6, which I have never used with the 8b10b decoder. When I ported my code over to the Virtex 6 of the GLIB, I did not take the time to also transfer the 8b10b decoder function thinking that it was not needed. Let me know if you need any help with the port from Virtex 5 to 6. If you diff the code in the attached zip against the GBT emulator code under emulator/sources/serdes/transceiver/xilinx/virtex5, you should be able to figure out what I changed to support 8b10b decoding. The filenames may have changed but the contents should be close except for my additions for the 8b10b decoder. The last 5 ports in gbt_gtx_120_serdes.vhd were added for the 8b10b decoder. You can trace these signals through the files to see what I did. Basically, I am breaking out these ports from the inner SERDES entity so that I can enable use of the 8b10b decoder. When you enable the decoder, the output data switches from the raw 40 bits to decoded 32 bits. You will definitely need Align_Dec8b10b.vhd to properly align the 32-bit words so that they are sent down the data stream in the correct order. Also, Deinterleave_Dec8b10b.vhd pulls out the valid data bits from the full 120-bit data word after alignment. These last two files are in the zip file on DocDB. So my 8b10b decoding is added within the GBT emulator code so that a bit in a control register can switch between standard GBT mode and 8b10b mode. Also, this code contains both the 8b10b encoder as well as the 8b10b decoding support logic (mentioned above). You should be able to follow these steps to recreate 8b10b decoding on your end: 1. Port the changes from my Virtex 5 gbt_gtx_120_serdes.vhd to your Virtex 6 implementation. The biggest challenge will be that you are likely using code that outputs 20-bits at 240 MHz out of the SerDes. That's how the GLIB does it. Due to the clocking within the ngCCM, it needs to output 40-bits at 120 MHz. I've actually implemented 40-bits at 120 MHz on the GLIB for other reasons so I can help with that. I recommend that structure for several reasons but mainly it should work with the Aligner without changes to Align_Dec8b10b.vhd since that expects 40-bits at 120 MHz. 2. Adding my code from DocDB (RTL_code_for_enc8b10b_test_20120224.zip) to your Xilinx project with GBT emulator code. The top level file is GBT_core.vhd. 3. Connect your code to use GBT_core.vhd 4. Change GBT_core.vhd to use your SerDes transceiver entitiy 5. As long as your receiver is returning 40-bit words at 120 MHz and you are returning the 8b10b decoder status bits, Align_Dec8b10b.vhd & Deinterleave_Dec8b10b.vhd should work without changes. 6. You should be able to force 8b10b decoding with the GBT_core.vhd port RX_Dec8b10b_Use by forcing it to be '1'. You should not need to make it a register bit if you don't want to. 7. The other entities that my code uses should be in the stock GBT emulator code. 8. If you don't need the serializer/tx, you should be able to remove that related code from GBT_core.vhd (primarily GBT_TX_core.vhd and whatever TX signals feed the SerDes) -- Stephen Goadhouse Electronics Engineer University of Virginia Physics Department office: room 265 434-982-5594 sgoadhouse@virginia.edu http://faculty.virginia.edu/phys-electronics